Q: I am planning to use the HMC624LP4E digital attenuator with +5V Supply(Vdd). In the datasheet, the voltage level for the high level state of the attenuator control signals is specified as +2 to +5 V @ <1 uA. My attenuator latch enable and attenuation state control signals are available in LVTTL logic(0/3.3 V from an LVTTL buffer).
The minimum high level voltage of the LVTTL buffer is +3.2 V at a sink current of 100 uA and +2.3 V at a sink current of 12 mA guaranteed for a temperature range of -40 C to +85 C.
1.Is the minimum high level voltage of +2V specified in the datasheet for the control lines guaranteed across the entire operating temperature of the digital attenuator?
2.Are there any issues in interfacing the LVTTL logic control lines directly to the digital attenuator inputs or do I have to use a LVTTL to TTL buffer for the control signals?