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ADV7393 flicker, vertical scroll and displayed twice

Question asked by vikas19 on Sep 30, 2016
Latest reply on Oct 19, 2016 by Anthony_Purcell



I am working on bringing up on ADV7393  which is a part of our custom target based on TI's Jacinto 6 and Linux.


I have configured ADV7393 in following mode and as per Table 77.


Input Format

525i (NTSC)

Input Data Width1

16-bit SDR

Synchronization Format

HSYNC (31.5KHz)/ VSYNC(60Hz)

Input Color Space


Output Color Space

CVBS/Y-C (S-Video)

Table Number

Table 77


However I am seeing continuous flicker  on display and sometime see the image on the display in between. Also table 77 mention of configuring subaddress  0x8A with value 0x0C (slave mode, mode2). But if I configure subaddres 0x8A with value 0x0D flicker gets resolved and see the image on display but it  continuously scrolls  vertically downward and image is also displayed twice horizontally (refer attached image).


Could you help me to understand what is going wrong here and how could I fix this?


Also I have configured ADV to operate in non-interlaced mode by changing subaddress 0x88 to 0x12 from 0x10 as interlace out is not supported by sw of soc.


I successfully displayed the test pattern as in the attached image.


ADV7393 is connected as follows


From SoC DPI1------16bit RGB--->ADV7393---->CVBS Connector----> Display Panel


I have configured SoC to generate following timing


DISPC: hsync 31468Hz, vsync 59Hz

DISPC: pck = 26999991


static const struct omap_video_timings harman_ntsc_timings = {
        .x_res          = 720,
        .y_res          = 480,
        .pixelclock     = 27000000,
        .hsw            = 62,
        .hfp            = 19,
        .hbp            = 57,
        .vsw            = 3,
        .vfp            = 10,
        .vbp            = 34,


        .vsync_level    = OMAPDSS_SIG_ACTIVE_HIGH,
        .hsync_level    = OMAPDSS_SIG_ACTIVE_HIGH,
        .interlace      = false,


I am suing following display.


Thanks & Regards,