AnsweredAssumed Answered

AD9690 Pipeline Latency w/ DDCs used

Question asked by sss on Sep 28, 2016
Latest reply on Nov 1, 2016 by deljones

Hi all,

 

Latency specification is only following at datasheet.

LATENCY
Pipeline Latency : 55 Clock cycles (typ) ; 5 No DDCs used. L = 2, M = 1, F = 1.

 

In other cases,
How to calculate/consider the valiable Pipeline Latency w/ DDCs used easy ?
; from the ADC analog input to the DDCs digital input .

 

And how value is the each latency following ?
 HB1 Filter Latency : ? Clock cycles
 HB1 + HB2 Filter Latency : ? Clock cycles
 HB1 + HB2 + HB3 Filter Latency : ? Clock cycles
 HB1 + HB2 + HB3 + HB4 Filter Latency : ? Clock cycles

 

Best regards,
sss

Outcomes