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number of taps of TX/RX FIR

Question asked by yan_ucom on Sep 20, 2016
Latest reply on Oct 6, 2016 by DragosB

Our RX signal chain clock configuration is {1280000000,640000000,320000000,160000000,80000000,40000000}

Our TX signal chain clock configuration is {1280000000,320000000,160000000,80000000,80000000,40000000}

 

Using AD9361 Filter Wizard, we got 128-tap filters for both TX and RX. However, the no-OS driver says that we can only use 64-tap filters. Looking into the code, we found the code calculates the limitation as following:

 

f (!phy->bypass_tx_fir) {
       max = (tx[DAC_FREQ] / tx[TX_SAMPL_FREQ]) * 16;
       if (phy->tx_fir_ntaps > max) {
              dev_err(dev,
                     "%s: Invalid: ratio ADC/2 / TX_SAMPL * 16 > TAPS"
                     "(max %"PRIu32", adc %"PRIu32", tx %"PRIu32")",
                     __func__, max, rx[ADC_FREQ], tx[TX_SAMPL_FREQ]);
              return -EINVAL;
       }
}

if (!phy->bypass_rx_fir) {
       max = ((rx[ADC_FREQ] / ((rx[ADC_FREQ] == rx[R2_FREQ]) ? 1 : 2)) /
                     rx[RX_SAMPL_FREQ]) * 16;
       if (phy->rx_fir_ntaps > max) {
              dev_err(dev,
                     "%s: Invalid: ratio ADC/2 / RX_SAMPL * 16 > TAPS (max %"PRIu32")",
                     __func__, max);
              return -EINVAL;
       }
}



tx[DAC_FREQ] = 320M tx[TX_SAMPL_FREQ]=80M320/80*16=64

rx[ADC_FREQ] =640Mrx[RX_SAMPL_FREQ]=80M640/2/80*16=64

 

 I wonder what causes the discrepancy. Thanks. 

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