The AD9361 Reference Manual (UG-570) has a recommended specification of the external clock phase noise (Figure 2. Phase Noise vs. Offset Frequency); The external clock frequency can range from 5 MHz to 320 MHz and the scaled frequency needs to range from 10 MHz to 80 MHz. So how does figure 2 relate to the scaled clock frequencies 10 MHz to 80 MHz. Is this graph for 10 MHz or 80 MHz? For instance if the graph is specified for 10 MHz operation, I would expect that the Phase noise vs, Offset frequency requirements would be less stringent at 80 MHz since the value of n to achieve the same RF output frequency would be lower (i.e. less of a noise multiplication factor). Basically can you please clarify the recommended Phase Noise vs. Offset Frequency graphs for an external clock of 10 MHz, 40 MHz, 80 MHz, and 320 MHz.