I'm studying about Zedboard and No-OS Driver of ADFMCOMSS2-EBZ along with Zedboard. I have some problem which I can not resolve:
1. I want to configure ADC IP before transmitting data because I want ADC will ready to receive the first data, the reference code has a 1000 delay after configuring DAC to capture ADC, so when I use capture.batch file the first data which I want to locate at the first cell is not there. I try to modify the adc_capture command, In the new adc_capture command, I configure ADC, then I use dac_init command before the first loop do while but the result is not my desire.
2. I also study about HDL reference design and I have some question:
- On the receive path, between IP pack and adc_dma, how to know IP adc_dma start operating because IP adc_dma does not have feedback signal to IP pack.
- Can the FIFO size of ADC_DMA extend ?
- When ADC_DMA IP receive data if IP pack has data already, may be the valid signal is high on one cycle? If ADC_DMA IP does not configure and the valid signal from PACK IP is high then what will happen ?
Thank you for helping me.