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AD5142A Power-up sequence and RESET pin

Question asked by iCaelum on Sep 10, 2016
Latest reply on Sep 28, 2016 by msamera

Hello, help needed

Power-up sequence: Can VLOGIC and digital inputs power-up before VDD?

Hardware protection of EEPROM and RDAC register: How is this made? (not described in data sheet)

Timing on RESET pin: Data sheet say maximum 10us. Is this correct? What happen if pin is held low for several seconds? (I have no need to send or receive data during this time)

Best Regards