AnsweredAssumed Answered

Configuring AD9578 over SPI Interface

Question asked by richard.van on Sep 9, 2016
Latest reply on Sep 21, 2016 by SteveBeccue

We have a 48MHz crystal on XO1 and XO2, and we are trying to generate a 100Mhz LVDS clock on OUT3.  We write the AD9578 register with the following values:

 

Register 0 00000000
Register 1 000000000000
Register 2 00305d
Register 3 24040000
Register 4 0410
Register 5 001f0000
Register 6 0000000000
Register 7 0000000000
Register 8 4095555550
Register 9 00590d0000
Register 10 0000
Register 11 00000000
Register 12 00000000
Register 13 00000000
Register 14 80000000
Register 15 000000

 

When we read the registers back we read:

 

0:  000003100000

1:  7A0800000000

2:  000000003A5D

3:  000024040000

4:  000000000410

5:  0000001F0000

6:  000000000000

7:  000000000000

8:  004095555550

9:  0000590D0000

A:  000000000000

B:  000000000000

C:  000000000000

D:  000000000000

E:  000080000000

F:  000000060000

 

So you can see that PLL2 isn't locked.  When we turn on the REFOUT on we can see a 48MHz clock so we know that the crystal is oscillating.  Is there more we need to do to get the PLL2 to lock?  Thanks.

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