AnsweredAssumed Answered

ADV7611 I2S out phase width

Question asked by FreddyS on Sep 8, 2016
Latest reply on Oct 5, 2016 by mattp

Hi.

 

I have a problem with the ADV7611 I2S data bit length format:

The audio stream goes from the chip on the I2S bus in 32-bit format towards iMX6.

 

Here the picture is attached showing good I2S output from SCLK / LRCLK / AP pins.

 

But the receiver (iMX6 AUDMUX/SSI input) cannot accept 32 bit input as stated by the NXP supporter

https://community.nxp.com/message/826224

 

I tried to play with the register HDMI_REG_03 (I2SBITWIDTH and I2SOUTMODE)

bits were walking successfully within the 32-bit phase slot but the phase width was not changed.

 

Fiddling the DPLL MCLK_FS_N setting has on effect too. Only MCLK bus was affected (not shown on the screenshot) which I do not use.

 

As reading the whole documentation thoroughly there is no way to change the phase width from 32 or 24 or 16 bytes?

 

Or are there some undocumented registers?

Pls help

 

Thanks.

Freddy

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