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Spi mode of AD7770

Question asked by darwinu on Sep 7, 2016
Latest reply on Sep 13, 2016 by musach

In the page 39 of AD7770 datasheet, there is an illustration that shows that the -CS, SDO, SDI and SCLK are to be connected to the FPGA or DSP.   My question,  is the SPI in AD7770 act as a slave when connected to the FPGA or DSP?

It means the SPI in the FPGA is acting as a master and the AD7770 is the slave.   I am asking this because I am confused.

The label below the arrow line going to FPGA or DSP says "SPI MASTER INTERFACE".  

When I check pin function description, Pin 19 is an input pin,  describe as

 

" DCLK Frequency Selection Pin 2 in Pin Control Mode (DCLK2). See Table 15 for more details.

  SPI Clock in SPI Control Mode (SCLK)."  

 

Based on my understanding on the SPI, the master generates the clock signal and the slave takes the clock signal for the operation.  

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