As I read almost all post related to this question, and I can not understand what I am doing wrong. I need to post a question, just in order to check am I doing something wrong.
I have implemented custom IP core which generates IQ samples at 8Msps. Samples have 2nd' complement format, and they are 16 bits long. I have connected my IP core I and Q signals directly to ad9361 IP core (dac_data_i0 and dac_data_q0). So I removed dac_unpack IP core. I have divided I_CLK that is coming from ad9361 IP core and I am using it as input clock for my Tx IP core (so from 16 MHz, I get 8MHz). In no os design, I have set up ad9361 to work in 1Tx1Rx mode, and I have set up 8Msps as a sampling rate.
After integrating everything output spectrum from Tx looks wrong, compare to what I expect. My samples are 100% ok, I checked them with my previous set up (with fmcomms1) and in matlab.
What could be wrong?
Could it be that by default af9361 expect some other format of samples rather than 2nd complement?
Could it be that I need to serve samples to DAC at I_CLK, although that would be strange?
Thank you in advance on any constructive suggestion,