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about logic high input threshold

Question asked by Lucast85 on Aug 31, 2016
Latest reply on Aug 31, 2016 by bkennedy

HI all!

I'm designing an isolation circuit for SPI communication (CLK, MOSI, CS and MISO) thus I'm using an ADuM6401 (isoPower insulator with 3ch out and 1ch in).

I want use it with Vdd1=5V and Viso=3.3V. The SPI signals (on both sides) will work with 0-3.3V logic.

 

What are the logic high input threshold? The datasheet rev.A on table 13 says, for the logic high: "0.7 × VISO or 0.7 × VDD1".

  1. This means that I must consider the lower value between 0.7*VISO=0.7*5=3.5V and 0.7*VDD1=0.7*3.3=2.31V, that is 2.31V?
  2. Or I must consider that the threshold are 0.7*VISO for the "left side signals" and 0.7*VDD1 for the "right side signals"

Thank you all!

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