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ADG732 working on one address bus

Question asked by Marceli2016 on Aug 21, 2016

In the chip's true table WR requires to CS be non active 1, which not allowing to latch chip separately from data on the address bus. I am controlling four ADG732 from decoder at CS1-4 at active 0. How to use multiply ADG732 chip to write latch separately in?

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