I recently acquired an AD9910 evaluation board and am now working to make an FPGA communicate via SPI with the AD9910. So far I have not been sucessfull. The chip does not seem to respond and my major concern is that I do not see any signal on the SYNC_CLK output. It looks like the chip does not power up. I checked the EXT_PWR_DOWN pin and it is in a low state, so the chip should wake up/activate when the corresponding registers are set. This happens when the evalutation controller sends the command, but not with my setup.
When using my connections, all USB devices on the board have been disabled through the jumpers, the SDO and SDIO jumpers have been removed. I am tapping into the lines via the U5 (SCLK, SDIO, CS) and U6 (IO_UPDATE) headers. The commands are decoded to the right values by an oscilloscope with digital inputs. The difference to my command sequence to the one send by the onboard controller is the timing. Setting single tone frequency (a total of 11 commands) takes a bit more than a second while mine onle take 400us. I noticed that the onboard controller leaves a long gap after the CS signal goes high and the IO_UPDATE is issued.
Does anyone have an idea what I could have missed or an idea how to check where the problem lies? It smells a bit like timing issues with the SDIO and SCLK lines but they are well above the 5ns hold time of the clock.