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AD9680 LOGIC INPUTS

Question asked by Gab. on Aug 19, 2016
Latest reply on Aug 31, 2016 by Gab.

1) Is it correct VIHmin=0,8xSPIVDD for LOGIC INPUTS (SDI, SCLK, CSB, PDWN/STBY)?

    For SPIVDD=1,8V VIHmin=1,44V is very high value (FPGA LVCMOS18 STANDARD has VOHmin=1,35V).

 

2) I want to use SYNCINB in CMOS (single ended) mode. Can you give me VIHmin and VILmax?

 

Thanks

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