Hardware: picozed-sdr som(rev.c) + AES-PZSDRCC-FMC-G(rev.c);
Vivado : 2015.4.2;
HDL version: hdl_2016_r1(download at 2016.08.05);
I want to build a reference project for the hardware manually on Vivado(never used makefile), some warnings occurred when build the libraries and project. and sdk project run error when initialize AD9361.
1st: about the constrain file.
VADJ SELECTION (P8) on the AES-PZSDRCC-FMC-G carrier board is open, means 1.8V for bank_12 and bank_13, but IOs of these banks is constrained to LVCMOS25 such as W15 , V19 ... in pzsdr_system_constr.xdc and system_constr.xdc. I cannot understand.
2nd: warnings of Vivado project.
more warnings occurred when building libraries and project than that referenced in Building HDL. some ports have no connection and some parameters are not used. can i ignore these warnings?
3rd: run error in sdk project.
I downloaded a no-os-2016-R1.zip at 2016.07.27. and i used the files in /ad9361/sw in sdk project. I used CONSOLE_COMMANDS, XILINX_PLATFORM, PICOZED_SDR in config.h. the project printed "AD9361 initialization error" as the pictures. But the project can run ok if i program fpga with the bit file in sd card.