Here is a query about the output phase of ADF4350. The output phase is not following the phase word written to the register. According to our datasheet.
1, A number of settings in the ADF4350 are double buffered. These include the modulus value, phase value, R counter value, reference doubler, reference divide-by-2, and current setting. This means that two events have to occur before the part uses a new value of any of the double buffered settings. First, the new value is latched into the device by writing to the appropriate register. Second, a new write must be performed on Register R0.
2, The phase word stands for the phase difference between the input reference and output signal. It should be a relative value, but not an absolute value.
Did some tests and found when I wrote the same phase word, the phase differences between reference input and output signal were different, it changed every time. The register words and testing results are shown as below.
The input reference is 10MHz and the output signal is 150MHz. Using ADF4350 as Integer-N PLL, but not Fractional-N PLL. I am not sure whether it is the reason the phase word doesn’t work and need your confirmation. Moreover, could you please give some comments on the issue? To be honest, I am not familiar with the performance of the output phase of ADF4350 and really want to learn more from the case.
Thanks so much for your time and help!