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BF525 - Bit descriptions for DBGCTL JTAG register?

Question asked by ian.rees on Aug 12, 2016
Latest reply on Aug 18, 2016 by ian.rees



   I'm working on a flash programmer utility for a board that uses the BF525.  We would like to use a vanilla build of OpenOCD (or could switch to UrJTAG possibly) and a generic FT2232-based JTAG emulator to do the programming.  So far, I can load a program in to L1 instruction memory through OpenOCD, but am having trouble with instructing the DSP to actually run that program.


From the documentation, it appears that the SYSRST bit in the DBGCTL register might be useful for resetting the processor, but I can't seem to find any description of which bit that actually is in DBGCTL, or how to use it.


Just hoping someone could point me to some documentation on the DBGCTL register, or ideally a method to get the processor to start execution at a particular L1 address, via JTAG.  Thanks!  -Ian-