I am interfacing MT46V16M16 as recommended in the manual.
While doing its layout, I have the following issue:
The hardware manual mentions that the SDRAM is to be placed as close as possible to the decoder and that the traces should be equal. I have placed it close to the decoder but am unable to maintain the equal lengths. As reference, I had a look in the layout of the Evaluation Board and also found that there too unequal lengths have been maintained.
Does it mean that the unequal lengths are unacceptable or that some specific signals need to be equal in length?
I have attached screenshots of etched length report of layout of Evaluation board.