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FMCDAQ2-EBZ SPI interface in Verilog/VHDL

Question asked by willsor on Aug 4, 2016
Latest reply on Aug 10, 2016 by CsomI

Hi,

 

I want to implement an SPI interface to be able to use Vivado's VIO's to write data to the config memory map of the FMCDAQ2-EBZ board. 2 questions.

 

1.

I have been looking at the reference design for the kc705 (the board I have) and the constraints file indicates the FMC header is used for the SPI_SIDO port (data port)

 

"38 set_property  -dict {PACKAGE_PIN  B30 IOSTANDARD LVCMOS25} [get_ports spi_sdio]  ; ## D14  FMC_HPC_LA09_P "

 

However the FMCDAQ2-EBZ has an SMA port labelled SPI_SDIO.

 

Which interface do I use as SDIO, the FMC pin or the SMA header ?

 

2.

Regarding the CSB pin (confusingly labelled CSN[2:0] in your reference design). What must this be set to for each of the memory map addresses? I don't understand why its 3 bit wide.

 

Best regards

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