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I/O Update pin behavior

Question asked by Ryan-G on Jul 30, 2016
Latest reply on Jan 3, 2017 by KennyG

Due to some design changes, I have switched to incorporate the AD9958 DDS into my system.

 

I read that the I/O Update pin is responsible for two things:

  1. Updating the registers with the values from the buffer
  2. Sending output from the adjusted values (automatically)

 

I mention the second thing, as there isn't anything analogous to an output trigger for this chip (that I've seen), so I'm treating it as a gatekeeper that's overly friendly.

 

Everything seems to be okay, and I understand most of what it does and offers, but I have a couple questions about the I/O Update pin.

  • How large is the serial buffer?

Page 32 mentions that the I/O update "can be sent for each communication cycle or can be sent when all serial operations are complete. However, data is not active until an I/O update is sent[...]". I'm worried that the buffer may not be large enough if I write all possible operations before sending the update. Should I think of the serial buffer as an arbitrary buffer, or is it more like the shadow register concept, where each register has an active register and its temporary buffer from SPI commands?

 

  • What happens if I leave I/O Update active until my next write session? Will it write all zeros to register 0x00?

I mentioned above that there's nothing analogous to trigger, so I'm wondering if I can use I/O Update as a form of trigger, or if I'll have to set up appropriate timing for effects to take place without causing unintended consequences. The timing diagram on page 30 shows I/O Update running for 4 clock cycles, followed by 2 clock cycles, so I'm wondering how important the timing of it is outside of the minimum of 2 clock cycles as specified in the requirements.

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