I'm using the FMCDAQ2 with the ZC706. I have a few questions about the HDL and software that captures data.
1. After reviewing the HDL project, I am assuming that the PL DDR3 is acting as the ADC data capture FIFO storage. If this is correct will increasing the capacity of the PL DDR3 from 1GB to 8GB increase the amount of continuous storage capability?
2. Is the ADC FIFO always running or is there an enable signal from the software interface that starts and stops the filling up of the data into the PL DDR3?
3. Is there an easy way to fill up the entire 1GB PL DDR3 with continuous samples and then stop recording, then write them out to a file on the PS SD card?
Thanks in advance for anyone's help.