I have been working on using the AD7961 A/D on the Zedboard (Using Zynq Chip) and have come across some errors I cannot figure out.
I am using the reference design from analog's wiki page
I managed to create an IP inside Vivado with matching ports in reference to the reference design. I'm using the the same hardware and software code that was provided.
When I try to run the software from SDK the processor goes into an unknown state. This error happens when the software begins to read the Data from the DMA core inside the ADC IP.
// program the DMA module in the ADC core
Xil_Out32((CF_BASEADDR + 0x040), 0x1); // Power up the core
Xil_Out32((CF_BASEADDR + 0x088), 0x7); // Reset overflows
Xil_Out32((CF_BASEADDR + 0x080), 0x0); // DMA stop
Xil_Out32((CF_BASEADDR + 0x084), size * 4 ); // Program the number of bytes to be captured
Xil_Out32((CF_BASEADDR + 0x080), 0x1); // Start capturing data
Do you know of any reason why this is happening?
Also, am I able to use the same hardware and software code for the zynq chip instead of the microblaze? The reference design uses Microblaze.
Any information would be greatly appreciated!
Thank you in advance,