Questions about the AD9161 DAC:
1. I know what the SPI clock rate is because it is in the data sheet but what is the maximum input clock rate for the AD9161? I am running 12G data into the DAC.
2. How many registers do I have to program in the DAC?
3. I want the most significant bit to go in first. I think that is the default in register 0X000. Is this a correct assumption?
3. I only need one SERDES lane. I wrote my code to the 0x201 register. The data I input is hex 20180 to use SERDES lane 7. Is this correct?