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AD9852 Parallel Programming Timing Diagram

Question asked by Cdeprez on Jul 11, 2016
Latest reply on Jul 11, 2016 by mcee

Hi everyone,

 

I'm working on a new experimental set up and I want to use AD9852 as a precise synthesizer.

 

I would like to use parallel programming and program my DDS output frequency in single tone mode. I am in trouble understanding the schematics which explained how to do parallel writing and above all the sequence to run to change the value of the different registers.

 

I have a few question on the timing diagram :

 

Are the data written on edges of WR signal ( rising, falling or both of them) ?

When the DDS determine in which register it should stores the data ?

 

 

I have written a sequence to change the value of 3 registers with Address 0, Address 1 and Address 2. In address 0 I want to store Data 0, store Data 1 in Address 1 and to store Data2 in Address 2

 

You can find the timing diagram of my programming sequence in the enclosed file

 

Can you tell me if my sequence/timing diagram will allow me to program the AD9852 or if I need to change it ?

 

 

Finally, I don't understand what is the default amplitude level of the DDS after a reset. Is it no output ?

 

Thank you for your help.

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