I can't see my possible error so I'm asking it here.
I've used the 256pointFFT example on the ADSP-21469 EZ-Board.
Running on 450MHz the calcuation time is around 21µs (measured with GPIO changing before and after the accelerator DMA operations).
But according to the ADSP-214xx_hwr_rev1.1.pdf the time should be:
2*256*2 + 256*log2(256) + 2*256 = 3584 cclk which is around 8µs.
Where is my error?