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I2C timing issues with SSM2529

Question asked by mnls on Jul 6, 2016
Latest reply on Feb 8, 2018 by Rysler

Hi,

 

I'm evaluating the SSM2529 audio amplifier on a custom pcb and I'm experiencing difficulties to get it running. The problem occurs with the I2C communication, before the I2S datastream has started. In certain situations, I'm not getting an ACK back. I can reproduce the issue with a centain PLL-setting in the microcontroller (the I2C master), while the resulting SDA/SCL output overall remains the same. Only some small differences can be seen. I particular, the time between the falling SCL and transision of the SDA. This can be seen below:

 

Overview.png

It seems unlikely that this small difference causes the chip to respond or not, but can't see any other mismatch on any of the pins. Also no hardware changes have been made in between tests.

 

Another interesting fact: by placing a small capacitor (22 pF) over the SDA line and ground, the issue was resolved with both PLL settings. Could it be that the chip latches the SDA on the falling edge of the clock instead of the rising edge? This would explain the time-critical behaviour I'm seeing.

 

Kind regards,

 

Maarten Lubbers

Kind regards,

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