This is about the differential DCO outputs from the AD9271. I am controlling this ADC with an FPGA. A 10 MHz signal is sent to the CLK pins, using the Figure 58. Single Ended circuit given by the datasheet.
When I tried to collect the digital bits from the DOUT pins of the ADC, I need to use the rising and falling edges of the DCO signal from the ADC chip. However, when seen with an oscilloscope, the DCO output from the ADC chip looks like a triangle wave, other than a clean square wave clock. I reckon it shouldn't be like this? at least not like triangle wave?
In terms of the external connection, the diffrential outputs from the ADC were routed to two adjacent ports of the FPGA and the signals firstly go into a differential buffer at the FPGA.
Attached are the photoes of the 10 MHz clock signal to the ADC and the DCO_P and DCO_N signal output from it.