I've been going through the ADSP-BF51x Blackfin Processor Hardware Reference and I found what I think is a discrepancy.
1) On page 16-12, it instructs the user to write data to the TWI_XMT_DATA register before enabling the TWI.
2) In Figure 23-13, it instructs the user to first enable the TWI, and then wait for the XMTSERV interrupt before writing data to the TWI_XMT_DATA.
It seems to me that 1) is correct. Can anyone with experience with the TWI module shed some light on this?