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Changing FMCDAQ2 output sampling rate

Question asked by Xu-Kevin on Jun 22, 2016
Latest reply on Jul 7, 2016 by MacP

Hi

First,I run the AD-FMCDAQ2-EBZ Microblaze Quick Start sucessfully.Then I want to change the AD9680 output sampling rate by the software IIO Oscilloscope.

I change the registers of the AD9523-1 to  make the 500MHz  ADC_clock.The JESD204B lane line rate becomes 5G/s for  AD9680. Then I change the register of AD9680 0x56E(JESD204B lane rate control) value to 0x10 .But I can not see any output plot .

Then I figure that maybe there are some problems when I change the registers of the AD9523-1.I change back the  register value of the AD9523-1. I decide to change the registers of AD9680 only in order to change the output line rate.

Then I try to change 0x201(Chip decimation ratio) value to 0x01(decimate by 2).And 0x56E(JESD204B lane rate control) value to 0x10.  I can not see any output plot.

And I try to change 0x10B(Clock divider) value to 0x01(divide by 2).And 0x56E(JESD204B lane rate control) value to 0x10.  I can not see any output plot either.

I wonder if there are some other registers of AD9680 I need to change .Please tell me.

Thanks!

 

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