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AD9910 PLL Locking Issue

Question asked by jm6492 on Jun 20, 2016
Latest reply on Jun 21, 2016 by mcee

I have encountered an odd issue when using the AD9910 crystal oscillator functionality. After consulting the PLL_Loop_Filter_Tool resource, I decided on the following values for the external components: C13 = 1000 pF, C15 = 51 pF, and R37 = 1000 ohm. I want a system clock frequency of 1000 MHz, so I am using a multiplier of 40 (with a CP current of 387 uA and VCO range set to 920 - 1080 MHz).

 

After a Master Reset, when I set up the appropriate settings in the Control Window and click Load, the "PLL Lock" green indicator light comes on, and the PLL seems to be properly locked to the 25 MHz crystal. However, as soon as I indicate that I want the board to do an internal I/O update and click Load, the "PLL Lock" light turns off, and nothing short of a Master Reset can restore it. Oddly, I can occasionally set the internal I/O update without harming the PLL lock, depending on the exact order in which I make the changes, but usually, doing so destabilizes the PLL. Do you have any idea if this is a result of the filter component values I have chosen? If not, what might be causing this problem?

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