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ADV7842 SDP_VIDEO_DETECTED_RAW bit unstable

Question asked by takashima.i54 on Jun 19, 2016
Latest reply on Sep 18, 2016 by takashima.i54

Our customer want to detect inputted SD component video signal with HDMI Audio mode simultaneously.

Therefore, they set ADC_HDMI_SIMULT_MODE=1 and PRIM_MODE[3:0]=0100 (CVBS & HDMI AUDIO Mode)

To determine which video format inputted, they are polling the SDP_VIDEO_DETECTED_RAW bit.

However, the SDP_VIDEO_DETECTED_RAW bit is unstable when the ADV7842 could not detect inputted SD component.

In case of CVBS or YC (S-Video), the SDP_VIDEO_DETECTED_RAW bit is stable, no problem.

Should they need to read another registers?

 

Please advise to solve this issue as soon as possible.

 

Best regards,

Takashima

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