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Interfacing ADV7341 with an FPGA

Question asked by Alon.J on Jun 15, 2016
Latest reply on Jun 21, 2016 by GuenterL

Hi,

 

I'm having issues with interfacing the ADV7341 encoder with an FPGA.

My goal is to send YCbCr 4:2:2 10 bit data to the encoder from the FPGA, and get a proper NTSC - SD video at the output.

I'm generating an EAV/SAV embedded timing data stream from the FPGA, while using the configuration table no.65 from the encoder's datasheet to program the encoder.

 

For testing purposes, I'm sending a constant black & white test image to the encoder (see in the attachments), and can't manage to get the right output from it.

There are several issues with the resulting image:

1. There is a wide black (dark gray actually) column at the right side of the screen, which seem like a blanking interval.

2. There are 2 rows, while one is wider and seems also like a blanking interval.

3. At each reset of the FPGA & Encoder I'm getting different row bars positions, sometimes with a lot of noise present.

4. The resulting image is a Grayscale instead of a color image (probably a configuration issue).

 

Overall it looks like some timing issues, while I'm using an 27Mhz data clock that is also supplied to the encoder.

I've coded the data timing as it stated in the itu - 656 specification for 525i.

 

Please advice me for where I could go wrong as I'm running out of options for using this encoder chip.

Pictures of the current result & the desired test image are attached.

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