I use HMC703 and HMC736
using frac mode
when i use adisimpll to simulate ,it can't lock
phase margin 60
how can i lock to my frequency
ADISimPLL indicates a lock condition after about 160us but to see a decrease in phase error you must increase the simulation time to 350us. This is similar to your other post at HMC703+HMC632 .
i use hittite-eval-software to control my circuits on my pcb,it can't lock too,but it locked to my wanted frequency.the ld_sdo shows '0' ,however i change other register.
If the part is locked but you do not see a logic "1" on LD_SDO check Reg 0x0F=0x81. This turns on the lock detect output.
i have checked,but it still did not lock
i solved this problem,change CPoffset to 0mA ,then LD_SDO='1'
Good to hear it now locks. With 10MHz comparison frequency, Fout=14.75GHz and Icp=2.54mA the offset current should be 91uA (Reg 0x09=0x24BFFF). The lock detector window size should be 51ns ( Reg 0x07=0x2CD).
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