Initial problem was that Xilinx SDK was unable to build FSBL due to missing xuartps_hw.h file. Xilinx recommended checking that the bitstream was generated without errors. Upon looking in Vivado, found error:
[Common 17-55] 'set _property' expects at least one object. [system_axi_ad9361_adc_dma_0_constr.xdc:6]
Internet search tells me this error usually means there is a mismatch between property and RTL file, as it is case sensitive.
Property in question is this:
set_property ASYNC_REG TRUE \
[get_cells -quiet -hier *cdc_sync_stage1_reg*] \
[get_cells -quiet -hier *cdc_sync_stage2_reg]
Unfortunately I can't actually look at that file, because it is proprietary IP.
What do I do to fix this?