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AD9913 - Pause between transfer of address and register data on serial SPI?

Question asked by andrewl on Jun 12, 2016
Latest reply on Jun 29, 2016 by andrewl

I'm having intermittent problems with reading and writing to the AD9913 with serial SPI. Is there a need to pause between the address and the data transfer? I'm running the SPI at 10MHz and have less than a 30% success rate with writing to an address, and almost 10% reading. I currently transfer all bits sequentially without any pauses between the address and data. Sometimes it seems like I can write to the CF2 to turn on the PLL, and I can read it back, with bit 0 indicating lock. However, I can't write to the FTW to change the frequency, nor can I write to the CFR1 to toggle on and off the SYNC_CLK.

Furthermore, I am using a FPGA to communicate via serial SPI to the AD9913. I can guarantee that I keep the
CS, PWR_DWN_CTL, and MASTER_RESET low during the full communication cycle. I toggle the IO_Update high for a few clks only after a write cycle. I toggle the  MASTER_RESET on power up and wait for a number of clks prior to initiating any communication cycles.


If anyone was encountered similar problems and has determined a solution, please let me know.