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Question about a output of TV monitor from ADV7391

Question asked by Se-woong on Jun 9, 2016
Latest reply on Jun 9, 2016 by GuenterL

Hello,

 

 

 

My customer uses ADV7391 in their board and has a issue at a screen output of TV monitor connected with ADV7391.

They say that th top side in their screen output of TV monitor has unwanted red lines ( in red box).

Please refer attached screenshot "Screen output of TV monitor .jpg".

 

Would you let me know any  possible reasons why these unwanted red lines are displayed in the screen output of TV monitor?

And  also how they can remove theselines (noises???)?

 

For solving this, they need your help.

 

 

 

And also please below test enviroment from my customer and let me know your opinion about above screenshot file.

 

1. Test Video Spec. Information

- Encoder: ADV7391

- Resolution: 720*480 (SD), Interlace, ITU-R BT656, YUV422

     hsync sync width : 62

     hsync back porch : 60

     hsync front porch 16

 

     vsync sync width : 3

     vsync back porch : 15

     vsync front porch : 4

 

2. Schematic

- Please refer attached schematic file 'adv7391.png".

 

3. Test Enviroment

- Use a composite RCA video cable for connecting between output of ADV7391 and Video terminal of composite terminal in TV.

 

4. Register setting Values

     1)

     #define ADV7391_REG_PWR_MODE       (0x00)

     #define ADV7391_REG_SW_RESET       (0x17)

     #define ADV7391_FLG_SW_RESET       (0x02)

     #define ADV7391_REG_DAC_OUT_LVL   (0x0B)

     #define ADV7391_REG_SD_MODE1       (0x80)

     #define ADV7391_REG_SD_MODE2       (0x82)

     #define ADV7391_REG_SD_MODE3      (0x83)

     #define ADV7391_REG_SD_SCL_LSB     (0x9C)

     #define ADV7391_FLG_DAC1_PWR       (0x10)

    

     2) Register Set

     {ADV7391_REG_SW_RESET,  ADV7391_FLG_SW_RESET},

     {ADV7391_REG_PWR_MODE, 0x00},

     {ADV7391_REG_DAC_OUT_LVL, 0x00},

     {ADV7391_REG_SD_MODE1, 0x10},

     {ADV7391_REG_SD_MODE2, 0xCB},

     {ADV7391_REG_SD_MODE3, 0x00},

     {ADV7391_REG_SD_SCL_LSB, 0x00},

 

     3) DAC1 enable

     {ADV7391_REG_PWR_MODE, ADV7391_FLG_DAC1_PWR},   

If you have any questions, please let me know.


Regards,

Se-woong

 

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