am wrking on ad9857 it is configered in single tone mode, problem is am not getting any response from dac, can any 1 help me out
Besides Kevin's previous remarks, the only other hardwire issuse is at the DAC output of the AD9857. The DAC output must have a DC path to ground for current flow via output resistors to ground or a grounded center-tapped transformer. I would not recommend biasing the output with a resistor divider from supply to ground. Just ground the center tap of the transformer. The only other thing is making sure you have a valid REF CLK signal to the part and pin 60 is set appropriately.
Try programming something simple to see if you can communicate to the AD9857.
1) Power up the device.
2) Set these inputs to logic 0 ( 21,22,24,25,25,27,66,67,79,80)
3) Set pin 23 to logic 1
4) Set pin 60 to the desired setting for the REF CLK input (single ended or differential)
5) Send a master reset pulse on pin 67. This will place the device's internal registers in a known state via the register map in the data sheet and it will initialize the SPI port too.
6)Bring pin CSB pin 23 low and write to register 0x01h to enable the full sleep mode bit only.
7) Then toggle one of the profile pins. This will cause an internal FUD to occur that will enable the
full sleep mode.
8) To check for full sleep mode either check for a drastic supply current change or measure
across the DAC rset resistor. It should be 1.2V normally and 0V when the full sleep bit is set to
9) Go back and forth with enabling and disabling the full sleep mode. Unitl this routine is controlled it no use to try any more additional programming.
I moved this question to the Direct Digital Synthesis community. Please continue the discussion here.
EngineerZone Community Manager
i have sent the attachment of PDF file of schematic,
we are able to write to the dac (AD9857) but reading from the DAC is getting problem.........., requesting you to checkout the DAC section in the schematic and reply plzzzzzzzzz.
waiting for your reply,
Are there any more details you can provide to help us solve the issue? You say you are now able to write to the part but cannot read from it? Can you attach your microcontroller code that is controlling the AD9857? Maybe it is some timing issue with the SPI interface. Can you send screenshots from a logic analyzer or oscilloscope showing the CS, SCLK, SDIO, and SDO lines during a read command?
i wanna know that, is there any mistake in hardware design side, have you gone through the schematic?
yes, written data and clock is observed at pin 24(sck) and pin25(Sdio) but we dont know that weither it is taking the written data, because it is not responding anything, in SDO also there is no any data.
i have attached the controller programme in a zip file, requesting you to checkout and reply me soon.
I took a look at your schematic. It was a little difficult to follow the connections at first, but I think I understand it now. It looks to be a close copy of the evaluation board. There were only two things I saw that would be a problem that you may have already fixed. First, in the upper right of page 3 you have RESET tied high. This will keep the part in reset and you won't be able to do anything with the part. Second, in the same section you have TXEN tied low. With this tied low, none of the data sent to the I & Q inputs would go to the output. The part will instead substitute all zeros for these inputs.
Aside from this, I can only think that maybe you are not issuing a FUD or you are not meeting some timing spec as shown in figures 27 and 28 on pages 24 and 25. I don't know the AD9857 quadrauture modulator as well as some of our straight DDS parts so there could be something I am missing. If any of the above is not the issue, either I or someone else will take a look at your code.
first off all so much thanks for reply,
1, we are driving reset as low from fpga.
2. Bcoz ad9857 configered in single tone mode.i think no need to drive TXEN am i rite?
can you plz tell me what and all inputs we should give to ad9857 to make it work in single tone mode.
am so thankfull to you for your replys........,
can you tell mewhat is the status of FUD pin in single tone mode?
in our FPGA code we are giving logic HIGH.
the DAC register values we are giving as.
address data in hex
these are the register setting in single tone mode........., is it correct?
plz check out and reply me soon.
FUD is active high, so it should be held low when not in use and pulsed high to transfer data from the SPI registers to the buffer registers.
All the default register settings you listed are correct except for Reg 07h. For single-tone mode the output scale factor must not exceed 1, which corresponds to a register setting of 80h (or less).
I did that changes in fpga code........., actual issue is the data what we are sending is not able to write into the DAC,
I mean we are not able to communicate with DAC.
if you have FPGA code for AD9857 in single tone mode can you plz share that to me.
now dac is reading default data ..........., ,
fault was the sclk,sdio,and chip select are connected to 1.8v logic , which should not now its corrected so, it is reading the data.........,
but now the problem is lock is not happening in dac.., and analog o/p is not coming.........,
Hi, Can you please send your schematic. It may help trouble shoot the issue.
Possible causes for no output.
1) Floating input pins like the power down pin, SYNCIO pin or master reset pin etc. Any of these pins floating could cause intermittent programming issues.
2) No REF CLK signal present or it's configured incorrectly. Check proper logic state on pin 60 is correct for either differential or single-ended operation.
3) Profile pins not pointing to the correct profile.
4) General programming issues.
5) No FUD or profile pin change after programming to transfer programmed data to the active registers.
6) No DAC Rset resistor present or the DAC output is not terminated to ground via load resistor or
Note, after power up make sure to send a master reset before programming. This will place the
internal registers in a known condition and initialize the SPI port.
Retrieving data ...