Can A/D conversions be initiated via the SPI or other means? It is not clear when the output registers are updated. The concern is managing latency.
You could set the Sync bits in DATA READY register (0x12) to generate a data ready hardware interrupt on the SYNC/ASEL pin, when new data is ready. This is cleared by reading the DATAX0-DATAY1 registers. This could be used to synchronize the data reads; unfortunately there is no way to externally trigger the reads.
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