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AD9361 SPECTRUM problem

Question asked by analotus on May 29, 2016
Latest reply on Jun 2, 2016 by mhennerich

Hello,

I use AD9361 designs these days, but I meet some problem.

 

I made the below frequency assignments in my system:

uint32_t Rx_clkfreq[6]={1280 000000, 80 000000, 80 000000, 80 000000, 40 000000, 40 000000};     

uint32_t Tx_clkfreq[6]={1280 000000, 80 000000, 80 000000, 80 000000, 40 000000, 10 000000};     

Accroding to the reference design in NO OS main.c:

uint32_t Rx_clkfreq[6]={786432000, 24576000, 12288000, 6144000, 3072000, 3072000};     

uint32_t Tx_clkfreq[6]={786432000, 12288000, 12288000, 6144000, 3072000, 3072000};     

 

There's some problems,

1)

Is it correct to use two differenct sample frequencies,  40M and 10M as above,  for receving and transmitting at the same time?

 

2)

For the  transmitting link,

I use a raised cosine FIR filter with fs=40 000000,  -3dB frequnce point  5Mhz.

I send 10Mhz  psedorandom  +/- 512 series  to stimulate the transmitt FIR input port.

Configurations:

1R1T FDD,

LVDS mode,

FPGA lvds port:

fb_clk: frequency  20Mhz

tx_frame: frequency  10Mhz

txd:   40Msps,  ddr data flow with muxed Imsb,Qmsb, Ilsb, Qlsb

tx_lo_freq to 140Mhz,

And I wish I will get a  raised cosine spetrum with 3dB-bandwith around 140Mhz.

The effect I  need is:between each two 10Msps baseband +/-512 data point will be 3 inserted zeros, then  the 4x interpolted 40MHZ data  flow go into  the 40Mhz-sample- rate rasied cosine FIR.

 

But I failed,  the spectrum's outline is defined the by the raised cosine spetrum with 3dB-bandwith.

But the inner part is 2*5Mhz main sinc spectrum.

The effect seemed  equals the 10Msps baseband +/-512 data flow has been decimated to 5Msps, and between each two none zero point, insert 7 zeros,  then passed the 40Mhz sample rate rasied cosine FIR.

 

What's wrong?

Will you please give some advice?

Thanks in advance for your kindly help.

 

Micah

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