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ADV7611 multiburst test issue

Question asked by robin.hu Employee on May 20, 2016
Latest reply on May 20, 2016 by mattp

1.System:

Setop Box HDMI(YCbCr444 or RGB, ASIC is HISI3716)-->ADV7611(16bit SDR YPbPr4:2:2)-->GS2972(serializer)-->SDI-->WFM700

 

2.Issue:

1) HDMI source-->BlackMatic converter-->SDI-->WFM700, to verify that multiburst test passed for both HD&SD.

2) With ADV7611, SD test ok

3) With ADV7611, HD test(1080i@50Hz) failed, Pr peak to peak amplitude is not flat, see attached result.

 

3. Configuration(reference from ADI):

//*********************************************************************************************

// Assign Part Address

//*********************************************************************************************

      I2C_RegWrite( ADDR_IO, 0xF4, ADDR_CEC  );    // CEC

      I2C_RegWrite( ADDR_IO, 0xF5, ADDR_INFO );    // INFOFRAME

      I2C_RegWrite( ADDR_IO, 0xF8, ADDR_DPLL );    // DPLL

      I2C_RegWrite( ADDR_IO, 0xF9, ADDR_KSV  );    // KSV

      I2C_RegWrite( ADDR_IO, 0xFA, ADDR_EDID );    // EDID

      I2C_RegWrite( ADDR_IO, 0xFB, ADDR_HDMI );    // HDMI

      I2C_RegWrite( ADDR_IO, 0xFD, ADDR_CP );        // CP

//*********************************************************************************************

// General config

//*********************************************************************************************

      I2C_RegWrite( ADDR_IO, 0x00, 0x14); // HD 1x1,1920x1080

      I2C_RegWrite( ADDR_IO, 0x01, 0x15 ); // 50Hz,HDMI_COMP

      I2C_RegWrite( ADDR_IO, 0x02, 0xF4 ); //Input color space depends on color space
reported by HDMI block.,Enables limited output range (16 to 235), Auto CSC,YCrCb out, Set op_656 bit

      I2C_RegWrite( ADDR_IO, 0x03, 0x80); //0x80=16-bit ITU-656 SDR mode,0x90=16-bit SDR 4:2:2 Mode 4

//      I2C_RegWrite( ADDR_IO, 0x05, 0x2C);    //AV Codes Insert

      I2C_RegWrite( ADDR_IO, 0x06, 0xA6 );    //Invert VS,HS pins

      I2C_RegWrite( ADDR_IO, 0x0B, 0x44 );    //Power up part

      I2C_RegWrite( ADDR_IO, 0x0C, 0x42 );//Power up part

      I2C_RegWrite( ADDR_IO, 0x14, 0x7F);    //Max Drive Strength

      I2C_RegWrite( ADDR_IO, 0x15, 0x80 );    // Disable Tristate of Pins

      I2C_RegWrite( ADDR_IO, 0x19, 0x8F);    //Enables LLC DLL,LLC DLL phase

      I2C_RegWrite( ADDR_IO, 0x33, 0x40 );    //Muxes the DLL output on LLC output

      I2C_RegWrite( ADDR_CP, 0xBA, 0x01 );    //Set HDMI FreeRun

      I2C_RegWrite( ADDR_KSV, 0x40, 0x81 );    //Disable HDCP 1.1 features

 

      I2C_RegWrite( ADDR_HDMI, 0x9B, 0x03 );    //ADI recommended setting

      I2C_RegWrite( ADDR_HDMI, 0x00, 0x08 );    // Set HDMI Input Port A (BG_MEAS_PORT_SEL =
001b)

      I2C_RegWrite( ADDR_HDMI, 0x02, 0x03 );    // Enable Ports A & B in background mode

      I2C_RegWrite( ADDR_HDMI, 0x83, 0xFC );    //Enable clock terminators for port A & B

      I2C_RegWrite( ADDR_HDMI, 0x6F, 0x0C );    //ADI recommended setting

      I2C_RegWrite( ADDR_HDMI, 0x85, 0x1F );    // ADI recommended setting

      I2C_RegWrite( ADDR_HDMI, 0x87, 0x70 );    // ADI recommended setting

      I2C_RegWrite( ADDR_HDMI, 0x8D, 0x04 );    //LFG Port A

      I2C_RegWrite( ADDR_HDMI, 0x8E, 0x1E );    //HFG Port A

      I2C_RegWrite( ADDR_HDMI, 0x1A, 0x80 );    //unmute audio,8A?

//      I2C_RegWrite( ADDR_HDMI, 0x39, 0x02 );    //48K sample

      I2C_RegWrite( ADDR_HDMI, 0x57, 0xDA );    // ADI recommended setting

      I2C_RegWrite( ADDR_HDMI, 0x58, 0x01 );    // ADI recommended setting

      I2C_RegWrite( ADDR_HDMI, 0x75, 0x10 );    // DDC drive strength

      I2C_RegWrite( ADDR_HDMI, 0x90, 0x04 );    // LFG Port B

      I2C_RegWrite( ADDR_HDMI, 0x91, 0x1E );    // HFG Port B

      I2C_RegWrite( ADDR_CP, 0xBD, 0x10); //Set DPP_BYPASS_EN to 1 to use the CP CSC,Address 0xBD[4]

      I2C_RegWrite( ADDR_HDMI, 0x1D, 0x00); //SettingSet UP_CONVERSION_MODE to 0,Address 0x1D[5]

      I2C_RegWrite( ADDR_IO, 0xE0, 0x80); //DS_WITHOUT_FILTER,Address 0xE0[7]: 1=downstreeam and
no-filter,0=downstreeam and filter

      I2C_RegWrite( ADDR_CP, 0xC9, 0x2D); //Set DIS_AUTO_PARAM_BUFF (CP Map, 0xC9[0]) slave free-run
parameters from PRIM_MODE and VID_STD

//      I2C_RegWrite( ADDR_IO, 0xBF, 0x01); // 1= HDMI data directly fed to output bypassing CP completely

      I2C_RegWrite( ADDR_CP, 0x3E, 0x80); //VID_ADJ_EN, Addr 44 (CP), Address 0x3E[7],1=Enable color
controls

      I2C_RegWrite( ADDR_CP, 0x3A, 0x80); //CP_CONTRAST[7:0]

      I2C_RegWrite( ADDR_CP, 0x3B, 0x80); //CP_SATURATION[7:0]

      I2C_RegWrite( ADDR_CP, 0x3C, 0x00); //CP_BRIGHTNESS[7:0]

      I2C_RegWrite( ADDR_CP, 0x3D, 0x00); //CP_HUE[7:0]

 

 

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