I have an ADAU1701 clocked by a 12.288MHz oscillator, which I am running at the 48kHz rate for the on-board DAC and ADC. I have a AD1938 codec with serial data pins connected to the ADAU1701. The AD1938 DAC serial input is set to slave on the DSP's LRCLK, and the AD1938 ADC is set to master.
It looks like I can set the frequency of the DSP's OUTPUT_BCLK and OUTPUT_LRCLK to be, say, 96kHz, independent of the DSPs sample rate. Is this correct?
(The reason I'd like to do this is to minimize the AD1938 latency, which is reduced with higher sample rates)