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100ns duty cycle, 100 Hz Analog digital conversion

Question asked by rebk on May 13, 2016
Latest reply on May 13, 2016 by larsc

I am a university student and would really appreciate your instructions/help on my project. I have a device with following output: 100ns duty cycle, Frequency is 100 Hz (means in each 10 ms I have only 100ns duty cycle) and pulse amplitude from 2 to 5 Volt. I need to convert this almost square pulse to digital to use in FPGA to control the pulse amplitude. For example if it goes higher and lower of a specific amount the FPGA should react.

I would really appreciate your kind instructions on the Analog Digital conversion part. If you need more information please let me know.

Regards

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