We are trying to build the reference HDL design for the FMCDAQ2 running on a Xilinx ZC706. The HDL 2015_r2 project builds and generates the bit file, and the ZC706 boots into Linux with the generated BOOT.BIN file. The problem is the IIO tools do not seem to be able to communicate with the FMCDAQ2.
We would like to be able to isolate where the issue is, software or the FPGA. Are the individual files used to generate the BOOT.BIN file available (FSBL & U-Boot elf and the FPGA bit files)?