In Digital Phase shifter#HMC648ALP6E
Is there any issue,if the positive supply is delayed by 5sec from Negative supply during Power ON
As we want to directly drive the parallel control lines [Bit 1 to Bit 6] using FPGA controller in LVTTL Logic by avoiding Buffers for space and cost reduction,
Can we use this part with Vdd=3.3V,Vss=-3.3V,Control Voltage=0/+3.3V,if it can be used what will be performance variation.
As we are planning to use this device in Multi channel Receiver sections,hence we want to know the leakage RF signal level at control lines[BIT 1 to BIT 6] to ensure the RF Isolation between channels.