I am currently working on SI analysis for ADC Interface.
The data sheet parameter t35 SCLK Period(page-4) is for 40MHz , can you provide the timing parameters for 66MHz ?
You are referring to slave serial interface. In this mode the device is configured to external serial data clk of SCLK pin. External SCLK minimum period is 25nS which is 40Mhz,unfortunately the 66Mhz is beyond the part specification. We can't guarantee the product performance at this clock speed.
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