ADP5054 VOUT wrong. all the 4 lane as vout.jpg, and the FB.jpg
For now, I see three possible issues with your design:
1. Looking at the schematic, there don't seem to be any caps connected to the output at all, which would explain the behavior of the output, please confirm.
2. You may also be hitting minimum On time. Looking at Buck2 for example, with a 12V input to 1V output, the duty ratio is very small at 1V/12V = 0.833 and the On time is about 0.833 *(1/ 600KHz) = 138ns. This number already hits the datasheet spec for minimum ON time (150ns max). One way to proceed is to lower your switching frequency, and recalculate the components.
3. What are the operating load currents for all the 4 channels?
I strongly advise that you use the ADP5054 designer tool to help you with the design. Here is the link:
yes, it is the output caps issue. add the 47uF cap,then it is ok
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