Hi

I want to design a PLL for multiplying the frequency of the reference input about 10MHz sine to 1GHz sine(or 1MHz sine to 100MHz sine),in this process.PFD(phase frequency detector) is a key component in low phase noise frequency multiplication appliations. there are two PFDs that have good phase noise performance from comparation in many frequency detector and PLLs.but I don't know how to compare this two PFDs.So which one has a better phase noise performance? and if the phase noise of the 10MHz and 1MHz input reference signals are equal. which one as for the input reference will produce the least phase noise(1MHz-100MHz or 10MHz-1GHz)? Thank you.

The HMC439 is a PFD but the HMC704 is a complete PLL with integrated PFD, DSM, N divider, R divider and charge pump. Since the phase noise floor of the HMC704 PLL follows 20logN+10log(Fpfd)-230 you will get the best phase noise by minimizing Fpfd for a given N value. With 1MHz reference the HMC704 requires a square wave reference input to meet its performance specifications.

Alternatively consider the HMC1031 PLL with 10MHz reference and 100MHz VCO. This solution attenuates PLL and reference phase noise by setting a very narrow loop BW (10Hz) without large loop filter component values.