As per the datasheet of ADV7612, the device by default gives out pixel data at the negative edge of LLC and the data needs to be sampled at the next positive edge.
We have a custom board where ADV7612 is used. Please find below the snapshots of the CRO measurements taken on this board showing LLC (first waveform) and P0 (second waveform) for 1080p60 video (148.5 MHz clock frequency).
From these waveform, it looks like ADV7612 by default gives out pixel data at the positive edge of the clock. Please note that we have not changed the LLC polarity, INV_LLC_POL = 0.
Based on this, could you please check and confirm the default active output edge of LLC?
This information is critically needed for us as we need to decide on the clock edge for appropriately sampling the ADV7612 pixel data.