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AD9525 PFD understanding

Question asked by schiepep on Apr 27, 2016
Latest reply on Apr 27, 2016 by schiepep

Hi,

 

I  have a problem with the understanding of the PFD with charge pump.

From the first attached graphic below I thought, that the charge pump will either pump up or is high impedance, as long as the reference frequency is higher than the VCO frequency.

 

I tried to picture this behaviour in ADIsimCLK.

In the second graphic attached, the VCO-frequency can never reach the frequency of the reference. So the reference frequency is always higher than the VCO frequency. But now, if you take a look at the PD output, it seems, that the charge pump pumps most of the time up, but with everey cycle slip (or with the frequency difference between VCO and Reference) the charge pump pumps down for a few cycles.

If I increase the anti backlash pulse width, the number of pump down cycles increases. I thought, the anti backlash pulse causes a short up and down pulse with everey rising edge at the pfd. But here it seems only to take effect if the reference edge overruns the  vco edge.

 

I guess, without the anti backlash pulse, the first attached picture would fit and the charge pump would never pump down. Is this right? How does the anti backlash pulse width affect this behaviour?

 

PFD_states.jpg

ADIsimCLK.jpg

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